Jae W. Lee (이재욱) Associate Professor Department of Computer Science and Engineering College of Engineering Seoul National University Email: jaewlee@snu.ac.kr Office: 301 Building, Room 506 (#301-506) Phone: +82-2-880-1834 Address: 1 Gwanak-ro, Gwanak-gu, Seoul 08826, Korea I have moved to SNU (starting Fall 2016).

Biography

I am was an assistant professor in the Department of Semiconductor Systems Engineering at Sungkyunkwan University (SKKU) until August 2016. Now I am an associate professor of Computer Science and Engineering (CSE) at Seoul National University (SNU). Before joining SKKU, I was a research associate in the Liberty Research Group at Princeton University, and a researcher and engineer at Parakinetics, Inc, tackling software challenges on multicore architectures with various compiler and run-time techniques. Prior to that, I contributed to multiple successful VLSI implementation projects including Physical Uncloneable Function (PUF) at MIT (as ASIC design lead), Raw Microprocessor at MIT and nForce2 chipset at Nvidia.

I completed my Ph.D. in Computer Science at MIT as a member of Computer Science and Artificial Intelligence Lab (CSAIL) under the guidance of Prof. Krste Asanovic (now at the University of California, Berkeley) and Prof. Arvind. Before coming to MIT, I received my M.S. from Stanford University and B.S. from Seoul National University--both in Electrical Engineering.

Research Interests

Computer architecture, compilers, parallel programming, VLSI design, and computer security

Selected/Recent Publications (Full list, Google Scholar profile)

Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors (PDF)
Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, and Nam Sung Kim
To Appear: IEEE Transactions on Parallel and Distributed Systems (TPDS), 2015.

A Fully Associative, Tagless DRAM Cache (PDF) (PPTX slides)
Yongjun Lee, Jongwon Kim, Hakbeom Jang, Hyunggyun Yang, Jangwoo Kim, Jinkyu Jeong, and Jae W. Lee
Proceedings of the 42nd IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2015.

Microbank: Architecting Through-Silicon Interposer-Based Main-Memory Systems (PDF)
Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, and Jae W. Lee
Proceedings of IEEE/ACM International Conference for High Performance Computing, Networking, Storage and Analysis (SC), November 2014.

Security Vulnerability in Processor-Interconnect Router Design (PDF)
Won Jun Song, John Kim, Jae W. Lee, and Dennis Abts
Proceedings of the 21st ACM Conference on Computer and Communications Security (CCS), November 2014.

QPR.js: A Runtime Framework for QoS-Aware Power Optimization for Parallel JavaScript Programs (PDF)
Wonjun Lee, Channoh Kim, and Jae W. Lee
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2014.

Reducing Memory Access Latency with Asymmetric DRAM Bank Organizations (PDF)
Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, and Jung Ho Ahn
Proceedings of the 40th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2013.

Practical Speculative Parallelization of Variable-Length Decompression Algorithms (PDF)
Hakbeom Jang, Channoh Kim, and Jae W. Lee
Proceedings of the 14th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), June 2013.

Practical Automatic Loop Specialization (PDF)
Taewook Oh, Hanjun Kim, Nick P. Johnson, Jae W. Lee, and David I. August
Proceedings of the 18th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2013.

Parcae: A System for Flexible Parallel Execution (PDF)
Arun Raman, Ayal Zaks, Jae W. Lee, and David I. August
Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2012.

Parallelism Orchestration using DoPE: the Degree of Parallelism Executive (PDF)
Arun Raman, Hanjun Kim, Taewook Oh, Jae W. Lee, and David I. August
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2011.

Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks (PDF)
Jae W. Lee, Man Cheuk Ng, and Krste Asanovic
Proceedings of the 35th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2008.

Secure Program Execution via Dynamic Information Flow Tracking (PDF)
G. Edward Suh, Jae W. Lee, David Zhang, and Srinivas Devadas
Proceedings of the 11th ACM Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2004.

A Technique to Build a Secret Key in Integrated Circuits for Identification and Authentication Applications (PDF)
Jae W. Lee, Daihyun Lim, Blaise Gassend, G. Edward Suh, Marten van Dijk, and Srinivas Devadas
Proceedings of the 2004 IEEE Symposium on VLSI Circuits (VLSI), June 2004.

The Raw Microprocessor: A Computational Fabric for Software Circuits and General Purpose Programs (PDF)
Michael Bedford Taylor, Jason Kim, Jason Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matt Frank, Saman Amarasinghe, and Anant Agarwal
IEEE Micro, Volume 22, Number 2, March 2002.